A significant problem associated with conventional electronic circuitry such as complementary metal-oxide-semiconductor (CMOS) circuits is that these circuits dissipate considerable amounts of power. The problem is getting worse as transistor size continues to be scaled down.
Various attempts have been made to address this problem by developing alternative circuit structures that do use as much energy as CMOS circuits. One such approach involves the construction of magnetic logic elements based on the propagation of magnetic domain walls in submicrometer planar nanowires. See D. A. Allwood et al., “Magnetic Domain-Wall Logic,” Science, Vol. 309, No. 5741, pp. 1688-1692, 9 Sep. 2005. In this approach, a magnetic domain wall, which is a transition between two different directions of magnetization representing respective first and second binary logic states, is propagated through a complex network of nanowires under the action of an externally applied magnetic field. This field rotates in the plane of the magnetic logic circuitry and acts as both the clock and the power supply. However, the requirement of an externally applied magnetic field is a significant drawback, as it unduly increases the cost and complexity of the circuitry.
An alternative implementation avoids the need for the externally applied magnetic field by using an array of electrical contacts adapted to make electrical connection with respective spaced points on a nanowire. The electrical contacts are coupled to an external electrical current source which supplies an oscillating current to the nanowire so as to effect the movement of the magnetic domain wall. See U.S. Patent Application Publication No. 2007/0030718, dated Feb. 8, 2007 and entitled “Magnetic Logic System.” However, the required electrical contact array and oscillating current source still result in unduly costly and complex circuit arrangements.